An Instruction-Level Energy Estimation Model for Embedded Systems

Low power consumption has been established as the third main design target for digital systems together with performance and area. Consequently, accurate estimators of the power consumption at the system as well as the lower levels of abstraction are necessary. A large number of embedded computing applications are power or energy critical. Early work on processor analysis had focused on performance improvement without determining the power-performance tradeoffs. Recently, significant research in low power design and power estimation and analysis has been developed. In this project, the measurements taken for the development of instruction-level energy models for microprocessors are presented and analyzed. By combining energy coefficient values, the presented model became much simpler than most proposed models that can speed up the energy estimation process and